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1.8V Auto-Zero In-Amp w/ Shutdown
Preliminary Technical Data
FEATURES
Low Offset Voltage: 25 V max Low Input Offset Drift: 0.1 V/C max High CMRR: 120 dB min @ G=100 Low Noise: 0.7 V p-p from 0.01Hz-10Hz Wide Gain Range: 1 to 10,000 Single Supply Operation: +1.8V to +5.5V Rail-to-Rail Output Shutdown capability
AD8553
10-Lead MSOP (RMZ-10)
RGA VINP VCC VO VFB RGB VINN
AD8553
GND VREF ENABLE
APPLICATIONS
Strain Gages Weigh Scales Pressure Sensors Laser Diode Control Loops Portable Medical Instruments Thermocouple Amplifiers
GENERAL DESCRIPTION
The AD8553 is a precision instrumentation amplifier featuring low noise, rail-to-rail output and a power-saving shutdown mode. The AD8553 also features low offset and drift coupled with high common mode rejection. In shutdown mode, the total supply current is reduced to less than 4 A. Operation is fully specified from +1.8V to +5.5V. With low offset voltage of 25V, offset voltage drift of 0.1V/C and voltage noise of only 0.7V p-p (0.01Hz to 10 Hz), the AD8553 is ideal for applications where error sources cannot be tolerated. Precision instrumentation, position and pressure sensors, medical instrumentation, and strain gauge amplifiers benefit from the low noise, low input bias current, and high common mode rejection. The small footprint and low cost are ideal for high volume applications. The small package and low power consumption allow maximum channel density or minimum board size for space-critical equipment and portable systems. The AD8553 is specified over the industrial temperature range from -40C to +85C. The AD8553 is available in the lead-free 10-lead MSOP.
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com (c) Analog Devices, Inc., 2005 Fax: 617/326-8703
Preliminary Technical Data
ELECTRICAL SPECIFICATIONS (V = 5V, V
S CM
AD8553
= 2.5V, VO =VREF = VCC/2, RL = 10k to GND, TA=25C unless
specified, G=1000 (R1 = 4k, R2 = 2M), G=100 (R1 = 3.92k, R2 = 196k), G=10 (R1 = 20k, R2 = 100k), G=1 (R1 = 200k,R2 = 100k))
Parameter INPUT CHARACTERISTICS Input Offset Voltage
Symbol Vos
Conditions G = 1000 G = 100 G = 10 G=1 G = 1000, -40C TA +85C G = 100, -40C TA +85C G = 10, -40C TA +85C G = 1, -40C TA +85C
Min
Typ
Max 25 25 50 350
Units V V V V V/C V/C V/C V/C nA nA nA
vs. Temperature
Vos/T
0.01 0.01 0.1 0.7 0.3
0.1 0.1 0.3 3 1 2 1
Input Bias Current Input Bias Current @ VREF Input Operating Impedance Differential Common-Mode Input Voltage Range Common-Mode Rejection Ratio
IB -40C TA +85C
0.02
75 || 2 100 || 2 0 120 105 100 3.35 140 140 120 0.25 0.5 50 0.006 0.035 0.8 VOH VOL PSRR ISY ISD VINH VINL -2- 2.4 0.8 G=100, Vs = 1.8V to 5.5V, VCM = 0V G=10, Vs = 1.8V to 5.5V, VCM = 0V IO = 0, VIN = 0V -40C TA +85C 4.925 0.075 100 90 120 106 1.1 2 4.2
M || pF M || pF V dB dB dB % % ppm/C % FS % FS V V V dB dB mA mA A V V
CMRR
G = 100, VCM = 0V to 3.35V -40C TA +85C G=10, VCM = 0V to 3.35V
Gain Error
G = 100, VCM = 12.125 mV, VO = 0.075V to 4.925V G = 10, VCM = 121.25mV,
Gain tempco Non-Linearity
VO = 0.075V to 4.925V -40C TA +85C G = 100, VCM = 12.125mV, VO = 0.075V to 4.925V G=10, VCM = 121.25mV, VO = 0.075V to 4.925V
VREF Range OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low POWER SUPPLY Power Supply Rejection Ratio Supply Current Supply Current Shutdown Mode ENABLE (pin) INPUTS Logic High Voltage Logic Low Voltage Rev. PrD
1.3 1.5 4
Preliminary Technical Data
NOISE PERFORMANCE Voltage Noise Voltage Noise Density Internal Clock Frequency Signal Bandwidth en p-p en f = 0.01 Hz to 10 Hz G = 100, f = 1 kHz G = 10, f = 1kHz G = 1 to 1000 0.7
AD8553
Vp-p nV/Hz 35 nV/Hz 150 kHz 40 kHz 1* (*500 Hz for x-grade samples)
-3- Rev. PrD
Preliminary Technical Data
ELECTRICAL SPECIFICATIONS (V = 1.8V, V
S CM
AD8553
= 0.1V, VO = VREF = VCC/2, RL = 10k to GND, TA=+25C unless
specified, G=1000 (R1 =4k, R2 = 2M), G=100 (R1 = 3.92k, R2 = 196k), G=10 (R1 =20k, R2 = 100k), G=1 (R1 =200k, R2 = 100k))
Parameter INPUT CHARACTERISTICS Input Offset Voltage
Symbol Vos
Conditions G = 1000 G = 100 G = 10 G=1 G = 1000, -40C TA +85C G = 100, -40C TA +85C G = 10 , -40C TA +85C G = 1, -40C TA +85C
Min
Typ
Max 30 30 60 500
Units V V V V V/C V/C V/C V/C
vs. Temperature
Vos/T
0.1 0.1
0.5 0.5 3 10
Input Bias Current Input Bias Current @ VREF Input Operating Impedance Differential Common-Mode Input Voltage Range Common-Mode Rejection Ratio
IB -40C TA +85C
0.3 0.02
1 2 1
nA nA nA
75 || 2 100 || 2 0 100 86 86 0.15 110 95 0.35 0.5
M || pF M || pF V dB dB dB % %
CMRR
G=100, VCM = 0V to 0.15V -40C TA +85C G=10, VCM = 0V to 0.15V
Gain Error
G = 100, VCM=4.125 mV, VO = 0.075V to 1.65V G = 10, VCM = 41.25mV, VO = 0.075V to 1.65V -40C TA +85C G= 100, VCM = 4.125mV, VO = 0.075V to 1.65V G=10, VCM = 41.25mV, VO = 0.075V to 1.65V 0.8 VOH VOL PSRR ISY ISD -4- RL = 10k to GND RL = 10k to GND G = 100, VS = 1.8V to 5.5V, VCM = 0V IO = 0, VIN = 0V -40C TA +85C 100 120 0.9 2 1.65 0.015 0.015
Gain tempco Non-Linearity
50
ppm/C % FS % FS
VREF Range OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low POWER SUPPLY Power Supply Rejection Ratio Supply Current Supply Current Shutdown Mode
1.0
V V
0.075
V dB
1.2 1.4 4
mA mA uA_________
Rev. PrD
Preliminary Technical Data
ENABLE (pin) INPUTS Logic High Voltage Logic Low Voltage NOISE PERFORMANCE Voltage Noise Voltage Noise Density Internal Clock Frequency Signal Bandwidth
AD8553
1.4 0.5 V V
Vp-p
VINH VINL
en p-p en f = 0.01 Hz to 10 Hz G= 100, f = 1 kHz G=10, f = 1kHz G=1 to 1000
1
nV/Hz 45 nV/Hz 180 kHz 40 kHz 1* (*500 Hz for x-grade samples)
ABSOLUTE MAXIMUM RATINGS Supply Voltage ......................................................................... +6V Input Voltage ....................................................................+Vsupply Differential Input Voltage1 ............................................... Vsupply Output Short-Circuit Duration to Gnd .............................. Indefinite Storage Temperature Range RM Package...................................................-65C to +150C Operating Temperature Range AD8553 ...........................................................-40C to +85C Junction Temperature Range RM Package...................................................-65C to +150C Lead Temperature Range (Soldering, 10 sec)...................... +300C Package Type 10-Lead MSOP (RMZ) NOTES
1 Differential input voltage is limited to 5.0 volts or the supply voltage, whichever is less. 2 is specified for the worst case conditions, i.e., is specified for device in socket JA JA for P-DIP packages; JAis specified for device soldered in circuit board for SOIC and TSSOP packages.
JA2 TBD
JC TBD
Units C/W
ORDERING GUIDE
Temperature Model Range AD8553ARMZ-R2 -40C to +85C AD8553ARMZ-REEL -40C to +85C Package Description 10-Lead MSOP 10-lead MSOP Suffix RM-10 RM-10
-5- Rev. PrD
Preliminary Technical Data
APPLICATIONS
Typical Configuration Figures 1 and 2 show a typical AD8553 circuit configuration for an A/D converter application.
AD8553
V S+ 0.1uF VIN+ 2
+
6 3 8 4 R3 300 VOUT
1 R1 10 VIN9 V S+
5
_
7
R2
C3 1uF GND
C2 100k 100k C4 0.1uF
GND
Figure 1. Single-supply connection diagram
-6- Rev. PrD
Preliminary Technical Data
VS+
AD8553
0.1uF
6 VIN+ 2
0.1uF 0.1uF
+
3 8 4
VS R3 300 VOUT
1 R1 10 VIN9 GND 5
_
7
R2
C3 1uF GND
C2
Figure 2. Dual-supply connection diagram
Gain Selection The gain of the AD8553 is set according to the following equation: G = 2*(R2/R1) For proper operation: (1) R1 > 3.92k (2) R1 > Vin / 13uA. Gain accuracy depends on the matching of the two external resistors. Any mismatch in resistor values results in a gain error. However, due to the current-mode operation of the AD8553, CMRR is not degraded because of resistor mismatch. Care should be taken when selecting and positioning the gain setting resistors. The resistors should be made of the same material and package style. Surface mount resistors are recommended. They should be positioned as close together as possible to minimize TC errors and feedback voltage errors. If resistor trimming is required to set a precise gain, trim resistor R2 only. Parasitic capacitance to pins 1 and 10 (resistor R1 connections) must be minimized. Reference Connection Unlike traditional three-opamp instrumentation amplifiers, parasitic resistance in series with the Vref pin (pin 7) does not degrade CMRR performance. This allows the AD8553 to attain its extremely high CMRR performance without the use of an external buffer amplifier driving the Vref pin. When using a single supply, the reference voltage can be set with a simple resistor voltage divider between the supply and ground (Figure 1). Capacitor C4 is recommended to filter supply noise. For optimal performance in single-supply applications, Vref should be set with a low-noise
-7- Rev. PrD
Preliminary Technical Data
AD8553
precision voltage reference (for example, from the ADC). In dual-supply applications, Vref can simply be connected to ground.
Output Filtering Filter capacitor C2 is required to limit the amount of switching noise present at the output. The recommended bandwidth of the filter created by C2 and R2 is 1.5 kHz (AD8553 x-grade samples are 500 Hz). The user should first select R1 and R2 based on the desired gain, then select C2 based on the following formula: C2 = 1/(1500*2**R2) Another single-pole R-C filter on the output is recommended. A filter frequency of 1.5kHz is recommended (AD8553 x-grade samples are 500 Hz). This filter can also serve as an anti-aliasing filter if the AD8553 is used to drive an A/D converter.
Maximizing Performance with a Proper Layout To achieve the maximum performance of the AD8553, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. Care must be taken to minimize parasitic capacitance on pins 1 and 10 (resistor R1 connections). Traces from the IC to R1 should be kept symmetric and as short as possible. Excessive capacitance on these pins results in a gain error. This effect is most prominent at low gains (G < 10).
Power Supply Bypassing A stable DC voltage should be used to power the AD8553. Noise on the supply pins may adversely affect performance. Bypass capacitors should be used to decouple the amplifier. For dual-supply operation, a 0.1 F surface-mount capacitor should be connected from each supply pin to ground. Additionally, another 0.1 F surface-mount capacitor should be connected between the supply lines to maintain DC precision. For single-supply operation, one 0.1 F surface-mount capacitor should be connected between the supply line and ground. All bypass capacitors should be positioned as close to the IC as possible. A 10 F tantalum capacitor may be used further away from the part for additional bypassing. In most cases, it may be shared by other precision ICs on the circuit board.
Load Drive Figures 1 and 2 show a typical AD8553 circuit configuration for an A/D converter application. In this case, R3 will react with the converter input resistance and typically cause a small gain error. This gain error is due to the voltage divider that occurs due to R3 and the converter input resistance, or RL. In some applications, the user may require a low impedance output drive from the AD8553. In this case, it is recommended that the user use the circuit shown in Figure 3. This circuit incorporates the second filter pole into the feedback of the output amplifier. This results in a low impedance output to drive the load, RL. If the required current, IL, for the load is significant, the user should consider the limitation on the output swing due to R3. In this case, the voltage at pin 4 is limited to the specified output swing, but the voltage at Vout is further limited by the voltage drop across R3, IL*R3.
-8- Rev. PrD
Preliminary Technical Data
V S+
AD8553
0.1uF
6 VIN+ 2
0.1uF 0.1uF
3 8 4
1 R1 10 VIN9 GND 5
R3 300
VOUT
_
7
C2
C3 1uF GND R2
Figure 3. AD8553 configuration for low impedance output drive
-9- Rev. PrD
PR05474-0-3/05(PrD)
+
V S-

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